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EZdesign SDK Toolset

EZdesign is a comprehensive set of design and testing software tools for developers, enabling rapid delivery to production of new designs based on EZchip's network processors. EZdesign allows designers to create, verify and implement NP-1c/NP-2 applications to meet specific functionality and performance targets.

 

EZdesign components include:

 

Microcode Development Environment: A unified GUI for editing and debugging code, including setting breakpoints, single-stepping program execution and access to internal resources. Features include a code editor, view of memory and register contents, performance charting, macro recording and script execution. The EZdesign MDE is used in development and debugging of code on both the simulator and the actual network processor.

 

Simulator: Provides cycle accurate simulation of the EZchip network processor for code functionality testing and performance optimization.

 

Assembler and Preprocessor: Generating optimized code for execution on EZchip's network processors. The assembly is interleaved with high-level macros.

 

Subroutine Library: Sources of pre-coded tasks that are common in many networking applications are provided to simplify and expedite code development.

 

Applications Library: Sample code implementing high-level applications for reference when designing new networking platforms and services. Tested source code is available for a L2 switching, Metro Ethernet switch, MPLS LER, VPLS and Draft Martini, IPv4 and IPv6 routing, ACL (Access Control Lists), Network Address Translation (NAT), firewall and more.

 

Frame Generator: A GUI guiding the programmer through the process of creating frames, layer by layer. Allows for generation of frames of different types, protocols and user-defined fields.

 

Structure Generator: A GUI enabling the definition of data structures used by the EZchip network processor for forwarding and policy table lookups (e.g. hash, trees), their keys and associated result information.

 

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